U.S. patent publication number 2002/0076903 and 2003/0209796 corresponding to Japanese patent publication number 2003-86948 disclose a method of making a wiring board having an electrically insulating substrate and a wiring pattern disposed in the substrate. In the method, multiple resin films made of thermoplastic resin are stacked and collectively joined together by application of pressure and heat, thereby forming the substrate.
In recent years, there has been an increasing need to reduce manufacturing time of a wiring board in order to reduce manufacturing cost of the wiring board. In the above method, since it takes several hours (e.g., 2 to 5 hours) to complete the pressure and heat application process, manufacturing cost of the wiring board can be reduced by reducing the time taken to complete the pressure and heat application process.
For example, the time taken to complete the pressure and heat application process can be reduced by increasing a gradient of change in temperature (i.e., a rate of change in temperature per unit time) in the pressure and heat application process. However, the present inventors have found that hydrolysis of thermoplastic resin included in the resin film occurs when the temperature change rate in the pressure and heat application process is increased. The hydrolysis of thermoplastic resin can degrade characteristics of the substrate such as heat resistance and mechanical strength.